Semiconductor device technology is increasingly relying on specialty semiconductor substrates to improve the performance of the n-channel field effect transistors (nFETs) and p-channel field effect transistors (pFETs) in complementary metal oxide semiconductor (CMOS) circuits. For example, the strong dependence of carrier mobility on silicon orientation has led to increased interest in hybrid orientation Si substrates in which nFETs are formed in (100)-oriented Si (the orientation in which electron mobility is higher) and pFETs are formed in (110)-oriented Si (the orientation in which hole mobility is higher), as described by M. Yang, et al. in “High Performance CMOS Fabricated on Hybrid Substrate with Different Surface Orientations,” IEDM 2003 Paper 18.7 and U.S. Patent Application Publication No. 2004/0256700 A1 entitled “High-performance CMOS SOI devices on hybrid crystal-oriented substrates.”
Amorphization/templated recrystallization (ATR) methods for fabricating hybrid orientation substrates such as disclosed, for example, in U.S. Patent Application Publication No. 2005/0116290 A1 entitled “Planar substrate with selected semiconductor surface orientations formed by localized amorphization and recrystallization of stacked template layers,” typically start with a first semiconductor layer having a first orientation directly bonded to a second semiconductor layer having a second orientation different from the first. Selected areas of the first semiconductor layer are amorphized by ion implantation, and then recrystallized into the orientation of the second semiconductor layer using the second semiconductor layer as a crystal template.
FIGS. 1A-1D show a “top amorphization/bottom templating” version of the ATR method of the '290 publication for forming a bulk hybrid orientation Si substrate. In this version of ATR, the first semiconductor layer being amorphized is on the top and the second semiconductor layer acting as a template is on the bottom. Specifically, FIG. 1A shows the starting substrate 10 which comprises a top silicon layer 20 having a first surface orientation, a bottom silicon layer or substrate 30 having a second surface orientation different from the first, and a bonded interface 40 between them. FIG. 1B shows the substrate of FIG. 1A (designated now as 10′) after formation of dielectric-filled shallow trench isolation (STI) regions 50. Selected regions of top Si layer 20 are then subjected to amorphizing ion implant 60 to produce one or more amorphized regions 70, as shown in FIG. 1C. The amorphizing ion implant 60 would typically be performed with Si or Ge ions. Amorphized regions 70 span the entire thickness of the upper Si layer 20, and extend into the lower Si layer 30. The amorphized regions 70 are then recrystallized into the second surface orientation, using the lower Si layer 30 as a template, to produce (idealized) planar hybrid orientation substrate 80 with recrystallized, changed-orientation Si region 90. In this example, the orientations of Si regions 30 and 90 may have a (100) orientation, while the Si regions 20 may have a (110) orientation.
In contrast to the idealized outcome shown in FIG. 1D, recrystallization of the amorphized Si region 70 in the structure of FIG. 1C would typically result in the structure of FIG. 2A, with end-of-range defects 97 and trench-edge defects 99. End-of-range defects are well studied and have been reported in, for example, K. S. Jones et al. “Effect of implant temperature on transient enhanced diffusion of boron in regrown silicon after amorphization by Si+ or Ge+ implantation” J. Appl. Phys. 81 (9), 1 May 1997, and trench-edge defects have been described previously by N. Burbure and K. S. Jones in “The effect of oxide trenches on defect formation and evolution in ion-implanted silicon,” Mat. Res. Soc. Symp. Proc. 810 C4.19 (2004) and K. L. Saenger et al. in “A study of trench-edge defect formation in (001) and (011) silicon recrystallized by solid phase epitaxy,” J. Appl. Phys. 101, 024908 (2007). As described in U.S. Patent Application Publication No. 2006/0154429 A1, end-of-range defects 97 remaining after ATR may be eliminated by including a high temperature (approximately 1300° C.) anneal as part of the recrystallization process, as shown in FIG. 2B. However, this high temperature annealing is not expected to be effective in eliminating trench-edge defects 99.
FIGS. 3A-3E show the geometry of trench-edge defects 99 in relation to a FET device that might comprise ATR'd region 90. Specifically, FIGS. 3A-3B show top views of ATR'd region 90 with (FIG. 3B) and without (FIG. 3A) FET gate and gate dielectric 112. In this example, ATR'd region 90 has a (001) surface orientation and rectilinear edges aligned with the in-plane <110> directions of the (001) crystal, as is typical for FETs in (001) silicon. Reference numeral 50 denotes the dielectric filled trench region. FIGS. 3C-3E show cross section views of FIG. 3B through lines C-C1, D-D1, and E-E1, respectively. Trench-edge defects 99 are a particular concern in circled regions 118, where they are directly under FET gate and gate dielectric 112 and may contribute to undesirable leakage.
One could devise methods to repair trench-edge defects 99, but none appear to be very practical. For example, one could re-amorphize the ATR'd regions to a shallower depth than the initial amorphization, and then recrystallize. This would still leave trench-edge defects, but they would be smaller, since the trench-edge defect size scales with the amorphization depth, as discussed in the publication by Burbure and Jones mentioned above. Alternatively one could remove the trench-edge defect regions and replace them with an insulator or epitaxially-grown Si. However, the steps to do this are quite complicated. It is therefore clear that the preferred approach would be to avoid forming trench-edge defects in the first place.
Trench-edge defect formation can be avoided with the ATR-before-STI process flow of FIGS. 4A-E. Specifically, FIG. 4A shows a starting substrate 10 such as shown in FIG. 1A. FIG. 4B shows the substrate 10 of FIG. 4A being subjected to amorphizing ion implant 60 to produce one or more amorphized regions 120 and non-amorphized regions 20′. Amorphized regions 120 span the entire thickness of the upper Si layer 20, and extend into the lower Si layer 30. Amorphized regions 120 are then recrystallized using the lower Si layer 30 as a template to produce ATR'd changed-orientation Si region 130. In conventionally oriented hybrid orientation substrates, ATR'd changed-orientation regions 130 would have a (001) surface orientation and rectilinear edges aligned with the in-plane <110> directions of the (001) base substrate 30, and original-orientation region 20′ would have a (011) surface orientation and rectilinear edges aligned with the mutually orthogonal in-plane <110> and <100> directions of the original-orientation (011) region 20′. As described in K. L. Saenger et al., “Mask-edge defects in hybrid orientation direct-Si-bonded substrates recrystallized by solid phase epitaxy after patterned amorphization,” J. Appl. Phys. 101, 084912 (2007), changed-orientation regions 130 are bordered below by end-of-range defects 97 and bordered laterally by boundary regions 140. For the conventional hybrid orientation substrate geometry, boundary regions 140 comprise angled edges 141 and, for feature edges parallel to in-plane <110> directions of the original orientation (011) region 20′, high-defectivity triangular regions 142 bounded by {111} planes of the upper (011) and lower (001) Si layers, as shown in FIG. 4C. Edge regions 140 are then replaced by STI regions 150, as shown in FIG. 4D. If desired, an optional high-temperature defect-removal anneal may be performed to remove end-of range defects 97, as shown in FIG. 4E.
While solving the trench-edge defect problem, the ATR-before-STI approach of FIGS. 4A-4E is only satisfactory when the lateral dimensions of STI regions 150 exceed the lateral dimensions of boundary regions 140. As device dimensions shrink, it becomes increasingly likely that the dimensions of STI regions 150 will have to be larger than desired in order to eliminate the boundary regions between original-orientation regions 20′ and ATR'd changed-orientation regions 130.
In view of the above, there is a continued need for developing new and improved methods of fabricating a hybrid orientation substrate in which the boundary regions between the changed-orientation and original-orientation regions are as narrow (i.e., as vertical) and as defect free as possible.